发明名称 |
Multichannel broadband transceiver system making use of a distributed control architecture for digital signal processor array |
摘要 |
A control message communication mechanism for use in a broadband transceiver system that includes multiple digital signal processors for performing real time signal processing tasks. One of the digital signal processor (DSPs) is designated as a master DSP. The remainder of the DSPs are arranged in rows and columns to provide a two-dimensional array. A pair of bit-serial interfaces on each DSP are connected in a vertical bus and horizontal loop arrangement. The vertical bus arrangement provides a primary mechanism for the master DSP to communicate control messages to the array DSPs. The horizontal loop mechanism provides a secondary way for DSPs to communicate control information with one another, without involving the master DSP, such as may be required to handle a particular call, without interrupting the more time critical primary connectivity mechanism.
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申请公布号 |
US6134229(A) |
申请公布日期 |
2000.10.17 |
申请号 |
US19970932793 |
申请日期 |
1997.09.05 |
申请人 |
AIRNET COMMUNICATIONS CORPORATION |
发明人 |
SCHWALLER, JOHN;SCHMUTZ, THOMAS;PLUM, ALLEN G.;COONS, DAVID D. |
分类号 |
H04W88/08;(IPC1-7):H04J3/00 |
主分类号 |
H04W88/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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