发明名称 Nonvolatile semiconductor memory device with soft-programming to adjust erased states of memory cells
摘要 A NAND cell unit includes a plurality of memory cells which are connected in series. An erase operation is effected on all memory cells. Then, a soft-program voltage, which is opposite in polarity to the erase voltage applied in the erase operation, is applied to all memory cells, thereby setting all memory cells out of an over-erased state. Thereafter, a program voltage of 20V is applied to the control gate of any selected one of the memory cells, 0V is applied to the control gates of the two memory cells provided adjacent to the selected memory cell, and 11V is applied to the control gates of the remaining memory cells. Data is thereby programmed into the selected memory cell. The time for which the program voltage is applied to the selected memory cell is adjusted in accordance with the data to be programmed into the selected memory cell. Hence, data "0" can be correctly programmed into the selected memory cell, multi-value data can be read from any selected memory cell at high speed.
申请公布号 US6134140(A) 申请公布日期 2000.10.17
申请号 US19980078137 申请日期 1998.05.14
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TANAKA, TOMOHARU;NAKAMURA, HIROSHI;TAKEUCHI, KEN;SHIROTA, RIICHIRO;ARAI, FUMITAKA;FUJIMURA, SUSUMU
分类号 G11C7/00;G11C11/56;G11C16/34;(IPC1-7):G11C16/04 主分类号 G11C7/00
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