发明名称 INTEGRATED CIRCUIT HAVING THE FUNCTION OF TESTING MEMORY USING VOLTAGE FOR STRESS AND METHOD FOR TESTING THE MEMORY
摘要 PURPOSE: An integrated circuit is provided to be capable of testing a memory by applying a voltage for stress to the memory upon a built-in self test using a simple circuit. CONSTITUTION: An integrated circuit(10) includes a supply power generator for clamping the level of an internal VC(IVC) generated itself in response to a control signal and for outputting the voltage for stress being the internal VC having the level that is not clamped as a supply voltage of a semiconductor memory(44). A stress controller(26) outputs the control signal in response to a built-in self test(BIST) request signal and a stress test signal inputted externally. A BIST unit(38) applies signals for testing whether the semiconductor memory(44) is defective or not to the semiconductor memory(44) and also tests whether the semiconductor memory(44) is defective or not in response to the signals from the semiconductor memory(44) in correspondence to the applied signals. The BIST request signal is generated when the semiconductor memory(44) is built-in self tested. The stress test signal is inputted when the stress test signal is inputted by applying the voltage for stress to the semiconductor memory to test the semiconductor memory(44).
申请公布号 KR100269322(B1) 申请公布日期 2000.10.16
申请号 KR19980001199 申请日期 1998.01.16
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, CHEOL HA
分类号 G01R31/28;G01R31/26;G11C5/14;G11C29/06;G11C29/12;G11C29/50;(IPC1-7):G01R31/26 主分类号 G01R31/28
代理机构 代理人
主权项
地址