AREA EFFICIENT VARIABLE LENGTH CODER

摘要

PURPOSE: A variable length codec apparatus is provided to be capable of coding symbols inputted from the outside into variable length codewords via bit serial processing. CONSTITUTION: A variable length codec apparatus includes an address generator(100) for generating the M number of address data(ADi). A codebook memory(200) stores the N number of variable length codewords into the M number of addresses. An entry mask memory(300) stores determination bits displaying whether respective entries are valid bits of the variable length codewords for all the entries of the variable length codewords stored at the codebook memory(200) as the M number of addresses. The first multiplexer(400) outputs the K-th bit in the first store codeword of N bits from the codebook memory(200) in response to symbols inputted from the outside. The second multiplexer(500) outputs the K-th bit in the second store codeword of N bits from the mask memory(300) in response to the symbols inputted from the outside. The packing unit(600) packs the codes from the first multiplexer(400) in response to the determination bits from the second multiplexer(500). M is the maximum code length of the variable length codeword, N is all the numbers of symbols that could be generated and K is a fixed number from 1 to N.