THRESHOLD VOLTAGE MEASURING CIRCUIT

摘要

PURPOSE: A threshold voltage measuring circuit is provided to reduce the fault rate of a semiconductor package by measuring the threshold voltage within each device. CONSTITUTION: A threshold voltage measuring circuit comprises a second PMOS transistor(P2) which receives a power voltage(Vdd) at a source and an enable signal(PE) at a gate. A gate of a first PMOS transistor(P1) is connected to a drain of the second PMOS transistor(P2). The first PMOS transistor(P1) receives the power voltage(Vdd) at a source. A drain of the first PMOS transistor(P1) is connected to a second port of an element. A first transmission gate(TRANS1) is provided to connect the drain of the second PMOS transistor(P2) to a first port of the element. A second NMOS transistor(N2) receives a disable signal(NE) at a gate. A source of the NMOS transistor(N2) is grounded. A gate of a first NMOS transistor(N1) is connected to the drain of the second NMOS transistor(N2). A second transmission gate(TRANS2) is provided to connect the drain of the second NMOS transistor(N2) to the first port of the element.