MEMORY CELL ARRANGEMENT AND METHOD FOR PRODUCING SAME

摘要

The invention relates to a transistor of a memory cell. The transistor is provided with an upper (S/Do) and a lower source/drain region. Said regions are situated between two first grooves (G1) and two second grooves that extend crosswise thereto. An insulated word line (W) overlaps the upper source/drain region (S/Do) and is provided with protuberances which extend into the second grooves (G2). A conductive structure (L) that is arranged in one of the first grooves (G1) and is laterally adjacent to the upper source/drain region (S/Do) is contacted by a contact (K) on the top of said structure. The contact (K) is arranged between adjacent word lines (W) and is connected to a condenser (P1, Kd, P2) of the memory cell, whereby said condenser is arranged above the word lines.