发明名称 DOT CLOCK REPRODUCING DEVICE
摘要 PROBLEM TO BE SOLVED: To automatically adjust a dot clock frequency of high precision by using the maximum value and the minimum value of the result of accumulating the absolute values of a difference between the sample values of an input signal. SOLUTION: A clear pulse is inputted in an accumulation circuit 24 to be cleared after a latch circuit 25 is latched and as the result, the accumulation result of each one vertical frequency is inputted to a maximum value detecting circuit 26, a minimum value detecting circuit 27 and a control circuit 28. The circuit 26 receives the output of the circuit 25 to detect the maximum value until then to store. The circuit 27 receives the output of the circuit 25 to detect the minimum value until then to store. The circuit 28 controls the phase of a dot clock by outputting a phase control signal to a PLL circuit 14 and controls the frequency of the dot clock by receiving the outputs of the circuit 26 and the circuit 27 and outputting a frequency control signal to the circuit 14.
申请公布号 JP2000276092(A) 申请公布日期 2000.10.06
申请号 JP19990077392 申请日期 1999.03.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ABE HIDEKI
分类号 G09G3/36;G02F1/133;G09G3/20;H04N5/06;H04N5/14;(IPC1-7):G09G3/20 主分类号 G09G3/36
代理机构 代理人
主权项
地址