发明名称 INSULATED-GATE SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
摘要 PROBLEM TO BE SOLVED: To cause a semiconductor device to have a high avalanche resistance and to make the surface concentration at a channel region unchanged when operated, by causing a buried diffusion region composed by diffusing second conductivity impurities buried in a substrate into a drain region to form a high-concentration second conductivity semiconductor region. SOLUTION: In an N-channel power MOSFET 20, sources 6 are completely covered with P-dot diffusion regions 4, by forming the diffusion regions 4 in a first epitaxial growth layer 2 by burying diffusion, forming P wells 5 and compensating diffusion regions 7 in a second epitaxial growth layer 3 from its surface, and diffusing the sources 6 into the P wells 5. Accordingly, a part having a high amplification factor of a parasitic transistor is difficult to be formed. Besides, avalanche resistance on the occasion of a reactance load is increased, since the MOSFET 20 has the compensating regions 7 for bringing source electrodes 10 into ohmic contact with the P wells 5 between sources 6, and the regions 7 are in touch with the diffusion regions 4.
申请公布号 JP2000277734(A) 申请公布日期 2000.10.06
申请号 JP19990086350 申请日期 1999.03.29
申请人 SHARP CORP 发明人 OKADA MASATAKE
分类号 H01L29/78;H01L21/336;H01L29/06;(IPC1-7):H01L29/78 主分类号 H01L29/78
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