发明名称 MICROCOMPUTER
摘要 <p>PROBLEM TO BE SOLVED: To further reduce the power consumption by inhibiting an initial setting circuit from operating with the set output of hold instruction flags set when a CPU circuit part executes a hold instruction. SOLUTION: When the power source is turned on and the source voltage VDD rises above the threshold voltage of a P-MOS 5, a charging current flows to a capacitor 10 through the P-MOS 5 and when its terminal voltage exceeds the threshold voltage of an inverter 11, the output of an OR gate 13 goes up to the 'H' level, so that a memory control circuit is initialized. Further, when a microcomputer executes a hold instruction, a latch circuit 14 is held at 'H' by a flag register indicating the hold state by the application of a clock signal CK, so that an N-MOS 7 is turned off. Consequently, the through current flowing through the P-MOS 5 and N-MOS 6 is cut off. That is, the microcomputer does not operate in the hold state and the power consumption is reduced.</p>
申请公布号 JP2000276462(A) 申请公布日期 2000.10.06
申请号 JP19990081793 申请日期 1999.03.25
申请人 SANYO ELECTRIC CO LTD 发明人 WATANABE TORU;HODAKA KAZUO
分类号 G06F1/24;G06F15/78;(IPC1-7):G06F15/78 主分类号 G06F1/24
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