| 摘要 |
PROBLEM TO BE SOLVED: To provide a precise analysis result with a circuit simulator by combining an input buffer amplifier having high output impedance in an odd number clock phase and a switch closed in an even number clock phase. SOLUTION: An input buffer amplifier BUF having high output impedance in an odd number clock phase and switches S3 and S4 closed in an even clock phase are combined. An input signal is buffered before it is connected to sampling capacitors C1 and C2 in a sampling phase and a signal depending on the switch-on resistance of an input switch is removed. The input buffer amplifier BUF is controlled by a digital enable signal EN and it operates like a voltage follower corresponding to the closed switch when the signal EN is equal to '1'. When the signal EN is '0', the input buffer amplifier BUF is closed and it has high output impedance. In a sampling period, a system is controlled by the switches S3 and S4.
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