| 摘要 |
PROBLEM TO BE SOLVED: To appropriately generate a clock signal and also to make drastically reducible malfunctions in a writing operation. SOLUTION: The control circuit 51 of this radio card 5 starts to supply a clock signal to an EEPROM 52 from a clock generation 51a at the time of starting to write write data stored in a data buffer 72, sends a dummy signal just before ending a writing operation to operate a booster circuit 71, discriminates whether the entire operation voltage in the card 5 can normally a writing operation to the EEPROM 52, reads write data stored in a data buffer 72 by write circuit 75 when it is discriminated that an operation voltage with which writing can normally be performed is secured and controls the writing operation to a data part 74. |
