发明名称 SYSTEM AND METHOD FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain a testing system which can make an input-output terminal to be shared in common without making the length of test data longer in a semiconductor integrated circuit having a plurality of scan chains. SOLUTION: Test data are supplied to terminals 13-15 exclusively used for tests by adding the cyclic redundant codes(CRC) of the data to the ends of the data. Then a CRC data signal decoding circuit 10 for the outputs of scan chains 21-23 decodes the cyclic redundant codes and outputs the decoded results to the terminals 13-15 through a bidirectional buffer circuit 20.
申请公布号 JP2000275305(A) 申请公布日期 2000.10.06
申请号 JP19990080679 申请日期 1999.03.25
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 MURATA NAOKI
分类号 H01L21/822;G01R31/28;H01L27/04;(IPC1-7):G01R31/28 主分类号 H01L21/822
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