发明名称 FAIL-SAFE CONTROLLER
摘要 PROBLEM TO BE SOLVED: To obtain a means which can processes an alternating signal unintentionally when an arithmetic processing program is generated or modified by making an output part output a specific signal pattern or the alternating signal only when control output data of a control arithmetic part specifies a danger- side output. SOLUTION: When an output signal 114 is outputted, a counter 1121 of an output monitor part 112 finds the alternating signal rising and counts the frequency of alteration of the alternating signal. The counter 1121 has its value reset when a control cycle start trigger 13 is inputted by one pulse. If the control arithmetic part gets out order and the control cycle start trigger 13 is delayed to cause the value 1125 of the counter 1121 to exceeds the upper-limit value 1124 of a counter upper-limit value setting register 1120, a large/small comparator 1122 outputs an output stop signal 1126. An output control part 1123 stops the alternating signal of the output signal and outputs a fixed-value signal as a control signal 2. Namely, when the control cycle start trigger 13 is delayed, a safe-side output is outputted.
申请公布号 JP2000276202(A) 申请公布日期 2000.10.06
申请号 JP19990085366 申请日期 1999.03.29
申请人 HITACHI LTD 发明人 YAMAGUCHI SHINICHIRO;TAKEHARA TAKESHI;MIYAZAKI NAOTO;FUJIWARA MICHIO
分类号 G06F11/30;G05B9/02;G06F11/00 主分类号 G06F11/30
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