SEMICONDUCTOR MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To enable switching the number of bits of storage data. SOLUTION: A row decoder C1 is arranged between first mats M1 and M2, and decoders R2, R3 are arranged between second mats M3, M4 and second mats M5, M6. Each decoder C1-C3 selects one side of adjacent mats and activates it in an operation mode, and activates both of adjacent mats in a second operation mode. Therefore, in the second operation mode, write-in and read-out of data having bit numbers being twice of the first operation mode can be performed.