| 摘要 |
PROBLEM TO BE SOLVED: To obtain a digital data transfer processor capable of executing some intermittent data transfer processing in the optimum state while considering of an access processing speed to a memory in the case of executing digital image data transfer processing of large capacity from a microprocessor. SOLUTION: In the case of executing digital data transfer processing from a microprocessor 1 to an image memory 2, a buffer memory 10 having some data storing capacity is arranged on a data route between the microprocessor 1 and a memory controller 5 and a row address decoding processing part 11 and a buffer management processing part 13 are also arranged between them. Consequently data transfer processing from the microprocessor 1 to the buffer memory 10 can be intermittently executed in each data series having the same row address.
|
