发明名称 Phase synchronization circuit in display unit of computer, has divider which divides output of voltage controlled oscillator corresponding to detected period and returns it to oscillator
摘要 A period detector (6) detects the period of an external input signal. A divider (5) divides the output of a voltage controlled oscillator (3) corresponding to detected period and returns it to the oscillator. The phase comparator (1), filter (2) and voltage controlled oscillator (3) are connected in series between the input and output. The output of the oscillator is fed back to the phase comparator. An INDEPENDENT CLAIM is also included for the deflection compensation circuit.
申请公布号 DE10006212(A1) 申请公布日期 2000.10.05
申请号 DE20001006212 申请日期 2000.02.11
申请人 NEC CORP., TOKIO/TOKYO 发明人 ESAKI, TAKAFUMI;UTO, YOSHIYUKI;FURUKAWA, HIROSHI;FUKUDA, YASUHIRO
分类号 G09G1/04;G09G1/16;G09G5/18;H03L7/08;H03L7/18;H03L7/197;H04N3/23;H04N5/12;(IPC1-7):G09G1/04;H03L7/06 主分类号 G09G1/04
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