发明名称 Check pattern for via-hole opening examination
摘要 To provide a check pattern whereby whether via-hole openings are made correctly or not can be examined without needing high precision positioning of the via-holes, a check pattern of the invention comprises: a check wiring (3) configured on a semiconductor substrate (2), an insulation film (4) formed on the semiconductor substrate (2) to cover the check wiring; and a pair of via-holes (6) each configured at each end of the check wiring (3), said each (6) positioned slightly shifted inversely with each other from a center line in a width direction of the check wiring (3), and a bottom of said each (6) being positioned to traverse both the check wiring (3) and the insulation film (4).
申请公布号 US6127733(A) 申请公布日期 2000.10.03
申请号 US19980034697 申请日期 1998.03.04
申请人 NEC CORPORATION 发明人 KINOSHITA, YASUSHI
分类号 H01L21/66;H01L21/768;H01L23/544;(IPC1-7):H01L23/48;H01L23/52;H01L29/40 主分类号 H01L21/66
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