发明名称 DATA SPEED CONVERSION CIRCUIT AND DATA PHASE CONVERSION CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To convert an input frame into a frame at a different speed and to output the converted frame with a simple circuit configuration, independently of the difference in speed between the input and output frames. SOLUTION: When converting an input frame into a high-speed output frame, for example, a phase comparator circuit 5 compares the phase of a low speed frame pulse from a timing generating circuit 4 with the phase of an output timing from a timing generating circuit 6, to select either of biphase latch timing signals from the circuit 4. A transfer circuit 2 latches an input frame converted into parallel data from a demultiplexer circuit 1, and a multiplexer circuit 3 outputs the input frame data that are multiplexed on other 8-bit parallel data on the basis of the output timing.</p>
申请公布号 JP2000269913(A) 申请公布日期 2000.09.29
申请号 JP19990072123 申请日期 1999.03.17
申请人 HITACHI COMMUN SYST INC 发明人 SANO MOTOAKI
分类号 H04J3/07;H04L7/00;(IPC1-7):H04J3/07 主分类号 H04J3/07
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