| 摘要 |
PROBLEM TO BE SOLVED: To obtain an A/D conversion circuit that can reduce a time required for A/D conversion processing. SOLUTION: For example, in the case of an A/D conversion circuit with 10-bit width precision, signals have been converted conventionally in 10-bits entirely. In this embodiment, however, the conversion is conducted in 5-bit width, for example, that is set by a conversion bit width setting circuit. Thus, an expected value generated by an expected value generating circuit 16 is generated within a range of 5-bit width. Thus, the number of times of using a control loop consisting of a control logic section 13, a D/A converter circuit 18 and a comparator section 21 is reduced from 10 times to five times thereby quickening the processing time. When the set conversion bit width is improper, a CPU 11 sets the conversion bit width again.
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