| 摘要 |
PROBLEM TO BE SOLVED: To provide an evaluation circuit which is installed on the same chip as a clock synchronous circuit to be evaluated and which can measure the operating speed of the clock synchronous circuit, whose operating speed is higher than the evaluable operating speed of an evaluation device such as an external tester or the like. SOLUTION: Data is inputted to a synchronous circuit 1 from a data input terminal 4. In succession, a clock signal is inputted from a clock input terminal 5. The number of steps of buffers which are selected by a clock selector 8 is adjusted. Out of a state that correct data is latched in an output data latch 3, the smallest number of steps is found. The smallest number of steps is multiplied by the delay time per step of the buffers. Then, its value is the operating time of the synchronous circuit 1. By this technique, the operating time of the synchronous circuit 1 can be found while the delay time per step of the buffers is used as a unit.
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