发明名称 |
SEMICONDUCTOR MEMORY AND ITS ADDRESS ALLOTTING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To obtain a semiconductor memory and its address allotting method that can effectively utilized a spare memory cell array for redundancy when a defect does not exist. SOLUTION: This device is characterized in that an address of a normal memory cell array 21 is previously allotted to a spare memory cell array 22 for redundancy. When a defect occurs in a normal cell region, its defective address is allotted to a memory cell for redundancy, and it is replaced with an address allotted to a memory cell for redundancy before the replacement. When a defect does not exist or it is very few even if it exists, read-out margin exists, since bit line capacity is small, and a spare memory cell array 22 for redundancy in which a consumption current is small in bit line restoring can be effectively utilized.
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申请公布号 |
JP2000268597(A) |
申请公布日期 |
2000.09.29 |
申请号 |
JP19990075715 |
申请日期 |
1999.03.19 |
申请人 |
TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP |
发明人 |
ISHIZUKA KENJI;MURAOKA KAZUYOSHI;HAYASHI SHINTARO;HAMADA MAKOTO;KOTANI RIYOUSHI |
分类号 |
G11C29/04;G11C29/00;(IPC1-7):G11C29/00 |
主分类号 |
G11C29/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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