摘要 |
<p>PROBLEM TO BE SOLVED: To make stable the sensing operation of a burst mode memory by keeping multi-level data sensed by one memory bank and sensing the multi-level data from another memory bank. SOLUTION: When an address bit signal ADD4 transits from a low level to a high level, data continuously latched in a data register 260R are sequentially outputted externally through an input/output buffer circuit 330 synchronously with a read enable signal REb. Simultaneously data with respect to a left side memory bank 110 L are sensed and the outputting is finished while data relating to a memory bank 110 R are in operation. The address bit signal ADD4 is used for bank selection and generated synchronously with the read enable signal Reb. When the read enable signal Reb transits from a high level to a low level, since no sensing is conducted for each sensing period, a power noise possibly produced during data outputting does not give any effect on the sensing operation.</p> |