发明名称 DMA CONTROLLER
摘要 PROBLEM TO BE SOLVED: To provide a DMA controller by which access to a shared bus by a CPU is secured by detecting an operating state of a device and changing the contents of mediation control of a bus according to its detected result. SOLUTION: The operating states of DMA control parts 1 to 3 are detected based on DMA processing signals dma 1 to 3 by a device monitoring part 208 in this DMA controller. And a priority order table is selected by a priority order table selecting part 218 according to the detected results of the device monitoring part 208. Thus, the mediation control of the bus is performed according to the priority order table according to the operating states of the DMA control parts 1 to 3 at a bus mediating part 206. Thereby, exclusive holding of the bus 5 by the DMA control part 1 to 3 is prevented and required access time is secured for the CPU 14 as well.
申请公布号 JP2000267993(A) 申请公布日期 2000.09.29
申请号 JP19990073181 申请日期 1999.03.18
申请人 MINOLTA CO LTD 发明人 MORITA KENICHI;MINAMI TAKESHI;SHIONOYA KAZUNORI;KAMEI NOBUO
分类号 G06F13/18;G06F13/28;G06F13/362;(IPC1-7):G06F13/362 主分类号 G06F13/18
代理机构 代理人
主权项
地址