发明名称 MEMORY CONTROL DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a memory control device capable of sharing a memory bus, reducing the number of buses and securing a fixed data transfer rate. SOLUTION: The memory control device is provided with memory controllers 9a, 9b for mutually monitoring and controlling data flowing in a shared bus 7 in order to evade the interference of data in the bus 7. Exclusive right is applied to plural memory controllers 9a, 9b so that data of fixed quantity can be alternately transferred to these controllers 9a, 9b through the bus 7 or preferentially transferred to either one of the controllers 9a, 9b. Consequently the number of I/O pins to/from a memory 6 is reduced and the interference of data in the bus 7 is avoided.
申请公布号 JP2000267928(A) 申请公布日期 2000.09.29
申请号 JP19990067880 申请日期 1999.03.15
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KUWANO HIDEYUKI;MURATA KAZUYUKI;YAMAGUCHI TAKEHITO;OKADA YUJI;TAKAHASHI NAOKI;TANAKA JOJI;HISATOMI KENJI
分类号 G06F12/06;G06F12/00;G06F13/18;G06T1/60;H04N1/21;(IPC1-7):G06F12/00 主分类号 G06F12/06
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