| 摘要 |
PROBLEM TO BE SOLVED: To remarkably improve the data processing efficiency of the whole system including a CPU by reducing the load of processing for rewriting a mode register by the CPU. SOLUTION: Only when a CPU 501 accesses a synchronous ROM 503 at first after supplying power to a mode register in a gate array 502 corresponding to the ROM 503 and starting system reset processing, an operable value is set up in the mode register for the ROM 503 by an interface included in the gate array 502.
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