发明名称 METHOD AND DEVICE FOR OPTIMIZING ASSEMBLER
摘要 PROBLEM TO BE SOLVED: To shorten time required for optimizing processing at the time of linking by not performing all the optimizing processing at the time of linking but previously finishing it at the time of assembling. SOLUTION: It is discriminated in an optimizing processing stage judging step whether optimizing instructions 101 and 102 of a file 105 can be optimized in the file or not. The optimizing instruction 101, for which it is judged that optimizing is enabled, becomes an optimized instruction 107 by performing optimizing processing at the time of assembling. This optimized instruction is handled similarly to an ordinary instruction at the time of linking and can be excluded from an optimizing processing object. Concerning the optimized instruction 102, it is similar to the optimized instruction 101 excepting for the selection of a small instruction size in optimizing processing. An optimizing instruction 103 of a file 106 is an optimizing instruction for which it is judged in the optimizing processing stage judging step that optimizing is disabled in the file, optimizing processing is not performed at the time of assembling but is performed at the time of linking as expressed by the state of an optimizing instruction 109, and the final instruction is determined.
申请公布号 JP2000267860(A) 申请公布日期 2000.09.29
申请号 JP19990071472 申请日期 1999.03.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HASHIGUCHI WATARU
分类号 G06F9/45;(IPC1-7):G06F9/45 主分类号 G06F9/45
代理机构 代理人
主权项
地址