发明名称 POWERING SEMICONDUCTOR DEVICE AND METHOD FOR FORMING SEMICONDUCTOR LAYER
摘要 PROBLEM TO BE SOLVED: To make compatible a high turn-off gain and low off-resistance by a method wherein there is formed an auxiliary region where a first conductive semiconductor layer and a second conductive semiconductor layer having a carrier integral amount the repetitive direction of a predetermined value or less are alternately adjacent to each other. SOLUTION: An auxiliary region 16 where a P-type layer and an N-type layer are alternately disposed is formed in a region sandwiched between P+-type gate layers 4, and a P-type layer of the auxiliary region 16 is connected to the P+-type gate layers 4. Here, a concentration and width of the respective layers are established so that carrier integral amounts calculated from concentration X width of the P-type layer and N-type layer of this auxiliary region 16 substantially agree with each other at schematically 5×1012 cm2 or less. With this structure, since the concentration of the N-type layer of the auxiliary region 16 can be established to be higher than that of an N--type base layer 2, it is possible to decrease resistance components of the region pinched between the P+-type gate layers 4. Accordingly, it is possible to obtain a high turn-off gain, and also to realize a sufficiently low on-resistance.
申请公布号 JP2000269518(A) 申请公布日期 2000.09.29
申请号 JP19990073282 申请日期 1999.03.18
申请人 TOSHIBA CORP 发明人 SHINOHE TAKASHI
分类号 H01L29/06;H01L29/47;H01L29/739;H01L29/78;H01L29/80;H01L29/872;(IPC1-7):H01L29/80 主分类号 H01L29/06
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