发明名称 |
High performance dram and method of manufacture |
摘要 |
<p>A process for forming a DRAM in a silicon chip that includes N-MOSFETs of the memory cells in its central area and C-MOSFETs of the support circuitry in the peripheral area. By the inclusion of a masking oxide layer over the peripheral area during the formation of the memory cells, there are formed N-MOSFETs that use N-doped polycide gates and P-MOSFETs that use P-doped polycide gates. The sources and drains include self-aligned silicide contacts. <IMAGE></p> |
申请公布号 |
EP1039533(A2) |
申请公布日期 |
2000.09.27 |
申请号 |
EP20000103620 |
申请日期 |
2000.02.21 |
申请人 |
INFINEON TECHNOLOGIES NORTH AMERICA CORP. |
发明人 |
TOBBEN, DIRK;ALSMEIER, JOHANN |
分类号 |
H01L27/108;H01L21/8242;(IPC1-7):H01L21/824 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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