发明名称 Electronic circuit apparatus having circuits for effectively compensating for clock skew
摘要 The present invention relates to, more specifically, an electronic circuit apparatus having a main system portion and a subsystem portion connected to the main system portion. In the electronic circuit apparatus, at least either the main system or the subsystem comprises a clock source, a clock wire having an outgoing path and an incoming path, wherein a clock signal from the clock source is inputted from one end of the outgoing path, and at least one receiver connected to an optional position of the outgoing path, further connected to a position of the outgoing path adjacent to the optional position, for supplying a clock signal having an optional delay level relative to the clock signal from the clock source according to a delay level between each clock signal at the positions.
申请公布号 US6124744(A) 申请公布日期 2000.09.26
申请号 US19970824743 申请日期 1997.03.26
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OOWAKI, YUKIHITO
分类号 G06F1/10;H03K5/13;H03K5/14;(IPC1-7):H03K5/14 主分类号 G06F1/10
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