发明名称 Semiconductor structure for long-term learning
摘要 A pMOS EEPROM cell includes a source, drain, channel, control gate and well contact. The device is a fully functional single element p-type floating gate MOSFET. A floating gate overlaps the well contact and completely surrounds the drain and source implants. The pMOS cell is written to by means of hot-electron injection, using an intrinsic feedback mechanism to write analog values. Hot electrons are generated in the channel by means of hole impact ionization at the transistor's drain. The pMOS cell is erased by Fowler-Nordheim tunneling. The tunneling voltage is applied only to the well to tunnel electrons from the floating gate. The well-source and well-drain junctions are protected from breakdown by means of guard rings.
申请公布号 US6125053(A) 申请公布日期 2000.09.26
申请号 US19980201677 申请日期 1998.11.30
申请人 CALIFORNIA INSTITUTE OF TECHNOLOGY 发明人 DIORIO, CHRISTOPHER J.;MEAD, CARVER A.
分类号 G11C16/04;(IPC1-7):G11C16/04 主分类号 G11C16/04
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