Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system

摘要

For a write operation, a synchronous semiconductor memory device in a single-data-rate SDRAM operation mode selects a memory cell column in accordance with a column select signal produced from a write clock produced in synchronization with an external clock signal without shifting the write clock. In a double-data-rate SDRAM operation mode, the synchronous semiconductor memory device selects the memory cell column in accordance with the column select signal produced from the write clock produced in synchronization with the external clock signal and shifted by selected clocks.