摘要 |
PURPOSE: An improved planarization method for a shallow trench isolation structure is provided for circuit with arbitrary density. CONSTITUTION: In a method for forming an isolation structure, a semiconductor substrate(100) with a plurality of trenches(101) downwardly formed thereon is provided. In addition, a non-etched surface(108) of the substrate(100) between the adjacent trenches(101) is covered with a nitride layer(102). Next, a conformal insulating filler(103) is deposited on the substrate(100) and a thinner conformal etching barrier(106) is then formed on the insulating filler(103). Subsequently, the etching barrier(106) above the non-etched surface(108) is removed so that the insulating filler(103) is partially exposed. Next, the exposed insulating filler(103) is isotropically etched, and then the remaining etching barrier(106) is selectively etched. Finally, a resultant surface is planarized by a chemical mechanical polishing technique. Preferably, the selective etch process for the etching barrier(106) may be performed with a higher etch rate of the etching barrier(106) to the insulating filler(103).
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申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
WALSH, SHAWN T.;CAMPBELL, JOHN E.;JOSH, SOMIT;FRIEDMAN, JAMES B.;MCGRENAGAN, MICHAEL J.;MARCOS, JENIS D.;SIVA, SOSSIARUN;YOKUM, TROY A.;MAVOURY ZAIDIP;BADOER, WAYNE A.;TRAN, JOE G.;LUAN, JU-EYE;HEARTCELL, MITCHELL L.;SHINN, GREGORY B. |