| 摘要 |
PROBLEM TO BE SOLVED: To shorten an initializing time of a holding data of a memory cell by connecting a 1st inverter circuit to a high order power source via a transfer gate for a 1st power source connection control, and connecting a 2nd inverter circuit to the high order power source via a transfer gate for a 2nd power source connection control. SOLUTION: A source terminal of a P-channel transistor of an inverter circuit 2 is connected to a high order power source via a transfer gate 12 for power source connection control, and a P-channel transistor 13 of an inverter circuit 3 is connected to the high order power source via a transfer gate 14 for power source connection control. When a bit line 7 and a bit line 10 are driven at a high level and a low level, respectively, the P-channel transistor 11 of the inverter circuit 2 for driving a connecting point 4 that will change from the high level to the low level is conducting but is disconnected from the high order power source, therefore, the inverter circuit 2 is not driving the bit line 7 at the high level via the transfer gate 6.
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