| 摘要 |
PROBLEM TO BE SOLVED: To attain slow reproduction by using a slow reproduction memory which has a capacity for two frames. SOLUTION: A CODEC 10 expands a received video stream to a base band, a CPU 50 controls a memory write control circuit 20 to write the stream in a frame memory 1 (31) or 2 (32) in the unit of frames. Furthermore, the CPU 50 controls a memory read control circuit 40 to read the data in the frame memory 1 (31) or 2 (32) in the unit of frames to realize slow reproduction. The CPU 50 decides its field update control sequence in a way that fields are not updated thrice consecutively when the memory write control circuit 20 does not update the frame data and at its succeeding field update period. That is, a pattern of '01 11' for field update control is not generated, where '1' denotes field update and '0' indicates no field update.
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