| 摘要 |
PROBLEM TO BE SOLVED: To simplify a circuit by sampling a received signal whose frequency is converted down to an intermediate frequency by a sampling frequency selected in the vicinity of the intermediate frequency and converting information denoting a position of consecutive '0s' or '1s' in a data stream into phase information of the signal whose frequency is down-converted to the intermediate frequency so as to attain demodulation without the need for conversion of the intermediate frequency. SOLUTION: A 1-bit A/D converter 12 converts a received signal whose frequency is down-converted to the intermediate frequency into binary data, and a timing oscillator 13 provides an output of a timing signal whose frequency is selected in the vicinity of an intermediate frequency. A frame assembling section 15 assembles a plurality of sampled data resulting from sampling the binary data that a sampling section 14 binarizes by the timing signal into one frame. A consecutive point detection section 16 and a position detection section 17 detect a position of consecutive '0s' or '1s' in the sampled data stream, and a phase assignment section 18 obtains a phase of the received signal by using a phase cross-reference table according to the detected position of the consecutive point. Thus, demodulation is attained without the need for conversion of the intermediate frequency and the circuit scale can be made small. |
