发明名称 |
IMAGE-FORMING APPARATUS FOR CONTROLLING PHASE OF CLOCK SIGNAL |
摘要 |
PROBLEM TO BE SOLVED: To sufficiently suppress radio noises, conform to various kinds of EMC standards and realize countermeasures at low costs to devices for transmitting signals at high speed or devices having a radio noise-shielding part complicated in a structure. SOLUTION: An HCLK control part 48 shifts a phase of an HCLK signal according to a phase control signal (DATAa, DATAb) to be outputted from an MPU. The phase control is carried out for the HCLK signal of each of MCYK colors. The HCLK signals are controlled to mutually offset respective higher harmonics to make a synthesized wave 0. |
申请公布号 |
JP2000255109(A) |
申请公布日期 |
2000.09.19 |
申请号 |
JP19990062407 |
申请日期 |
1999.03.09 |
申请人 |
CASIO ELECTRONICS CO LTD;CASIO COMPUT CO LTD |
发明人 |
IJICHI YUTAKA |
分类号 |
B41J2/525;G03G15/01;G03G15/04;G03G15/043;(IPC1-7):B41J2/525 |
主分类号 |
B41J2/525 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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