发明名称 Switching down conversion mixer for use in multi-stage receiver architectures
摘要 A mixer circuit (400) for use with a multi-stage receiver (200) accepts a single ended or differential (i.e. balanced) input (401). A voltage to current converter (402) comprised of a single RF transistor coupled to the input (401) provides a single current node (404) having a current proportional to a received input. A switching network (408) employs a plurality of stages (406). Each stage (406) is connected to the current node (404) and further has a control line (A, B, C, D). A clock signal generator connected to the control lines (A, B, C, D) of the switching network stage (406), generates clock signals having a frequency equal to the frequency of the received RF input signal. The switching network (408) under control of the clock signals switches the current at a frequency equal to the frequency of the received RF input signal to generate baseband I and Q signals. If the mixer (500) is differential, the balanced signal inputs (520) will be 180 DEG out of phase, one to another. In addition, the mixer (500) will consist of a first (510) and second (515) switching network. Of importance, only one first (510) and one second (515) switching network stage is active at any instant in time.
申请公布号 US6121819(A) 申请公布日期 2000.09.19
申请号 US19980055445 申请日期 1998.04.06
申请人 MOTOROLA, INC. 发明人 TRAYLOR, KEVIN B.
分类号 G06G7/12;H03D7/14;H04B1/30;(IPC1-7):G06G7/12 主分类号 G06G7/12
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