发明名称 Bus termination circuitry and methods for implementing the same
摘要 Disclosed is a host adapter having automatic termination, and a method for implementing the automatic termination. The host adapter includes a first connector for connecting to at least one external peripheral device and a second connector for connecting to at least one internal peripheral device. The host adapter further includes a termination system circuit that is coupled between the first connector and the second connector. The termination system circuit is configured to produce bit data that is indicative of whether a peripheral device is coupled to one or both of the first connector and the second connector. Preferably, the termination system circuit communicates the bit data to a software termination engine upon boot-up to enable or disable a termination of the host adapter. Furthermore, the termination system circuit includes a termination control decoder and a tri-state buffer. The host adapter also includes a termination over-ride control that is configured to over-ride the automatic termination generated by the termination system circuit via a software control.
申请公布号 US6122689(A) 申请公布日期 2000.09.19
申请号 US19980078346 申请日期 1998.05.13
申请人 ADAPTEC, INC. 发明人 CHEUNG, PETER K.
分类号 G06F13/40;(IPC1-7):G06F13/00 主分类号 G06F13/40
代理机构 代理人
主权项
地址
您可能感兴趣的专利