METHOD AND DEVICE FOR OFFSET CORRECTION OF PHASE LOCKED LOOP CIRCUIT

摘要

PURPOSE: A method and device for offset correction of a phase locked loop circuit is provided to maximize the error rate inputted to a phase corrector(400) by correcting the offset generated from error rate output from a phase detector(200) and inputted to the phase corrector(400) according to the corrected and uncorrected numbers of errors at an Error Correcting Code(ECC) correction status register when data is reproduced. CONSTITUTION: A method and device for offset correction of a phase locked loop circuit includes following steps. A voltage control generator(10, 100) generates output frequency inversely proportional to the voltage differential of each signal inputted from outside. A phase/frequency detector(30, 300) generates error signals proportional to the phase and frequency differential by comparing the signals generated from the voltage control generator(10, 100) and the RF signals in the digital form inputted from outside. An Error Correcting Code(ECC) correction status register(600) corrects the errors of data reproduced by a disk and displays the result. A controller(700) receives the result of the ECC correction status register(600), calculates the average of the corrected and uncorrected numbers of errors in a specific disk sector, and generates offset correction voltage corresponding to each average to a phase corrector(400).