发明名称 MULTI-DATA SCRAMBLING CIRCUIT
摘要 PURPOSE: A circuit for scrambling multiple data is provided to selectively receive input data having mutually different sizes and divide the data by predetermined bits, and to scramble the divided input data and re-combine the data to have an identical size with the size of the input data for outputting. CONSTITUTION: A multiplexer(MUX1) selectively outputs input data(DIN) having mutually different sizes according to control signals(S0,S1). A divider(7) divides the input data(DIN) inputted through the multiplexer(MUX1) according to the control signals(S0,S1), by 2-byte. A storage unit(1) stores a cipher key and a scrambling function. A selector(2) selectively outputs the cipher key and scrambling function stored in the storage unit(1) according to the input data(DIN). The first to fourth processors(3-6) scramble the 2-byte data inputted through the divider(7) according to an output signal of the selector(2). And a combiner(8) combines the data scrambled through the first to fourth processors(3-6) to be an identical size with the size of the input data(DIN)..
申请公布号 KR100266605(B1) 申请公布日期 2000.09.15
申请号 KR19980004753 申请日期 1998.02.17
申请人 LG ELECTRONICS INC. 发明人 LEE, YOO SIK
分类号 H04K1/04;H04L9/18;(IPC1-7):H04K1/04 主分类号 H04K1/04
代理机构 代理人
主权项
地址