| 摘要 |
PURPOSE: A frequency divider with a possible program is provided to prevent reduction of speed according to the extension of bit and to make a circuit simple and to reduce electric power. CONSTITUTION: The frequency divider with the possible program includes a two-frequency divider(200), a detecting circuit(201), a program transposition circuit block(300), the first inverter(302), the second inverter(308), the third and fourth D-flip flops(304, 306), a T-flip flop(310) and clock control transistors(312). The program transposition circuit block(300) is connected to the two-frequency divider(200) and the detecting circuit(201). The third and fourth D-flip flops(304, 306) input the output of the detecting circuit(201) through the first inverter(302) and input the clock through the second inverter(308). The clock control transistors(312) control the clock according to the output value of the fourth D flip flop(306) and the programed value. The T-flip flop(310) divides the clock into two by receiving the output of the clock control transistors(312). The program transposition circuit block(300) controls the size of the input frequency input to the two-frequency divider(200).
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