| 摘要 |
PURPOSE: A latch circuit is provided to prevent wrong operation of a circuit by that glitch isn't conveyed to the output step of a latch circuit with making a latch enactive by a latch control portion during the glitch generated when transition of the input signal is carried out. CONSTITUTION: The latch circuit includes the first latch portion(30), the second latch portion(31), an AND gate(AN), and a delay portion(32). The first latch portion(30) inputs the input signal(INPUT) and the delay signal(S3) and removes glitch generated when transition of the input signal(INPUT) from the low electric potential to the high electric potential is carried out. The second latch portion(31) inputs the input signal(INPUT) and the delay signal(S3) through the inverter(IN) and removes glitch generated when transition of the input signal(INPUT) from the high electric potential to the low electric potential is carried out. The AND gate(AN) inputs the output signals(S2, S6) of the first and second latch portions(30, 31) and outputs the latch enable signal(EN). The delay portion(32) inputs the latch enable signal(EN) of the AND gate(AN) and delays it for the appointed time.
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