发明名称 MOVING PICTURE DECODING APPRATUS
摘要 <p>An appartaus for expanding a compressed digital video signal is disclosed representing a motion picture to provide a digital video output signal. The compressed digital video signal comprises plural interlaced frames and has a frame rate of 24 Hz, the digital video output signal comprises plural pictures and has a picture rate of at least 49 Hz. The apparatus comprises a frame memory (45) comprising no more than four pages, each page storing one frame, expander means for expanding each frame of the compressed digital video signal to derive a reconstructed interlaced frame and control means (68). The control means (68) operates by writing of each reconstructed interlaced frame into one page of the frame memory (45) and reading out of the reconstructed interlaced frames stored in the pages of the frame memory (45) to provide the pictures of the digital video output signal. The reading out is controlled to effect 2-3 pull down conversion of the reconstructed interlaced frames stored in the pages of the frame memory (45) with a frame rate of 24 Hz to provide the pictures of the digital video output signal with a picture rate of at least 49 Hz. &lt;IMAGE&gt;</p>
申请公布号 KR100265192(B1) 申请公布日期 2000.09.15
申请号 KR19930025766 申请日期 1993.11.30
申请人 SONY CORPORATION 发明人 TSUKAGOSI, IKUO
分类号 H04N5/253;H04N7/01;H04N19/42;H04N19/423;H04N19/50;H04N19/503;H04N19/51;H04N19/577;H04N19/587;H04N19/59;H04N19/61;H04N19/625;H04N19/65;H04N19/85;H04N19/89;(IPC1-7):H04N7/247 主分类号 H04N5/253
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