| 摘要 |
PURPOSE: A semiconductor memory device having multi-bank memory arrays is provided to reduce testing time by simultaneously accessing many memory banks to simultaneously write data having same values in same locations of the memory banks, and by combining the written data to output the data. CONSTITUTION: A semiconductor memory device having multi-bank memory arrays is composed of a bank selector(8'). The bank selector is composed of four NAND gates(N81-N84) and one inverter(INV81). The first NAND gate applies a NAND combination to a bank selecting address signal(A11) and a bank enable signal(BANKEN), and outputs a first signal(O1). The second NAND gate applies a NAND combination to the bank selecting address signal and the enable signal, and outputs a second signal(O2). The third/the fourth NAND gates combine all bank selecting signals(ALLBANKs) reversed from the two signals(O1,O2), and output two bank enable signals(XBANK1,XBANK2) to first/second memory banks(6,7). The ALLBANKs makes an entire system simultaneously enable the first/the second memory banks. A controller or a command decoder sets up ALLBANKs. If the reversed ALLBANKs are high levels, the bank enable signals are decided by the signals(O1,O2). The memory banks are selectively enabled by the two signals(O1,O2).
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