发明名称 |
FABRICATION METHOD FOR TRIPLE WELL OF SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A method for manufacturing a triple well of a semiconductor memory device is provided to improve an electrical characteristic of a triple well by performing a simplified process. CONSTITUTION: A pad oxide layer(205) is formed on a semiconductor substrate(200) of a P type. The first well(210) of P-type is defined by forming the first mask pattern. The first well(210) of P-type is formed by implanting P-type dopant ions. The second mask pattern is formed on the semiconductor substrate(200). The first well(330) of N-type is formed on a peripheral region and a sidewall(342) is formed on a memory cell array region by implanting N-type dopant ions. The third mask pattern(444M) is formed on the substrate(200). A base region(444) is formed by implanting N-type dopant ions. The second well(440) of N-type is formed by the base region(444).
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申请公布号 |
KR100265774(B1) |
申请公布日期 |
2000.09.15 |
申请号 |
KR19980026652 |
申请日期 |
1998.07.02 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SIM, SANG-PIL;LEE, WON-SEONG |
分类号 |
H01L21/8238;H01L21/265;H01L21/76;H01L21/8242;H01L27/092;H01L27/108;(IPC1-7):H01L21/265 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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