发明名称 SEMICONDUCTOR DEVICE SYSTEM AND SEMICONDUCTOR DEVICE
摘要 <p>A system and a semiconductor device for realizing such a system are disclosed. The system uses at least a semiconductor device for retrieving an input signal in synchronism with an internal clock generated from an external clock, the input signal remaining effectively in synchronism with the external clock. Even in the case where a phase difference develops between a clock and a signal at the receiving end, or even in the case where a phase difference develops between a clock input circuit and other signal input circuits in the semiconductor device at the receiving end, data can be transferred at high speed. Each input circuit of the semiconductor device at the receiving end includes an input timing adjusting circuit for adjusting the phase of the clock applied to the input circuit in such a manner that the input circuit retrieves the input signal in an effective and stable state. In the case where the skew between the input signals is small as compared with the skew between the input signals and the clock, an input timing adjusting circuit is shared by a plurality of the input circuits.</p>
申请公布号 KR100266352(B1) 申请公布日期 2000.09.15
申请号 KR19970042704 申请日期 1997.08.29
申请人 FUJITSU LIMITED 发明人 TAKEMAE, YOSHIHIRO;TAGUCHI, MASAO;MATSUZAKI, YASUROU;TOMITA, HIROYOSHI;MOCHIZUKI, HIROHIKO;HATAKEYAMA, ATSUSHI;OKAJIMA, YOSHINORI;NAKANO, MASAO
分类号 G06F13/42;G06F1/10;G06F1/12;G11C7/10;G11C7/22;G11C11/401;G11C11/407;G11C11/4076;G11C11/4093;H03K5/00;H03K5/13;H03K5/135;H03L7/00;H03L7/081;H04L7/00;(IPC1-7):G11C11/409 主分类号 G06F13/42
代理机构 代理人
主权项
地址