| 摘要 |
PURPOSE: An apparatus for inputting fail information is provided to suppress necessary memory amounts and to reduce a redress/interpretation processing time for a semiconductor memory. CONSTITUTION: An apparatus for inputting fail information comprises an address selector(602), a memory controller(604), a memory(606), a block fail memory(BFM)(612), a sub block fail memory(SBFM)(614), a BFM address selector(608), a SBFM address selector(610), a SBFM fail input controller(616), and an OR circuit(618). The address selector selects AFM addresses corresponding to memory cells. The memory controller selects a memory member inputting fail information among many memory members configuring memories, when a fail signal presenting memory cell failures is inputted. The memory controller outputs a fail input signal(/STR) as 'L'. The memory has many memory members. The memory stores fail information presenting whether each memory cell has a failure. The memory is operated when the fail input signal is 'L', and stows a logic value 'H' as fail information in a self region corresponding to the AFM addresses. The BFM address selector selects addresses of redressing blocks. The BFM stores the fail information and is operated when failure cells are generated in the redressing blocks. The SBFM address selector selects addresses of sub blocks of the redressing blocks. The SBFM fail input controller outputs a fail information stow prohibiting signal. The OR circuit applies OR operations for the /STR and an INH signal of the SBFM fail input controller. The SBFM stores fail information presenting whether failures are generated in the sub blocks.
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