| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of pads used for test mode entry. SOLUTION: Only a pad 11A for clock signal and a pad 11B for input data are connected to a serial register 9 of this semiconductor memory. Input data are successively written in a M bit serial register 9 one bit by one bit. When upper (m) bits of the serial register 9 indicates an address take-in code, an address transfer signal and an address take-in signal are made an enable-state, lower M-m bits of the serial register are transferred and taken in test signal output circuits 6-1, 6-2,... 6-N as a test address signal.
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