发明名称 DIGITAL/ANALOG SUBTERMINAL
摘要 1469872 Pulse-code-modulation terminals NORTHERN TELECOM Ltd 28 June 1974 [29 June 1973] 28850/74 Heading H3H In a terminal for one channel in a pulse-codemodulation transmission system for transmitting a pulse train of recurrent frames divided into a plurality of channels, the clock pulses required for analogue-to-digital and/or digital-toanalogue conversion at the terminal are derived from the frame and digit synchronization pulses from the incoming digital signals. A counter 32 counts the recovered clock pulses and is reset to zero at the beginning of each frame. If there are more quantizing steps than total number of digits per frame a frequency multiplier could be driven by the recovered clock pulses or two or more coders could be provided operating in succession on a single channel. Analogue-to-digital conversion.-The analogue signal 70 is sampled by capacitor 73 the voltage on which then decays exponentially and is compared at 82 with an exponentially increasing voltage on capacitor 76 of polarity determined by detector 83 which also controls the polarity bit of the digital output signal. The count in counter 32 is transferred to register 86 when the comparator 82 switches over. The polarity bit is added at 87 and the digital output signal is gated out on the channel selected at 33 via AND gate 88 and OR gate 16. Digital-to-analogue conversion.-The incoming digital signal is converted to parallel form at 40 and a capacitor 51 charged to a positive or negative voltage in dependence on the polarity bit. The charge then decays exponentially during the time taken for the output of counter 32 to equal the amplitude bits, held at 43. Switch 57 is then opened and the output of amplifier 50 gated out through audio filter 58.
申请公布号 IE41198(L) 申请公布日期 1974.12.29
申请号 IE19740001382 申请日期 1974.06.28
申请人 NORTHERN TELECOM LTD 发明人
分类号 H04J3/08;H04J3/12;(IPC1-7):H03K13/01;H03K13/04 主分类号 H04J3/08
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