| 摘要 |
PROBLEM TO BE SOLVED: To suppress the parasitic inductance to a minimum and to reduce the size and the weight of a package by mounting the lower surface of a power transistor die to a substrate and mounting a control IC to the upper surface of the power transistor die using an insulating epoxy. SOLUTION: A package 20 forms an enclosure having an internal space 28 in accordance with a lower part 22A and an upper part 22B. A part of a terminal 24 forms a part of a lead frame 40 in the internal space 28. The lower surface of a transistor Q2 is electrically connected to a pad region of the lead frame 40 at the interface 42 using an electrically conductive epoxy. Further, a control IC 16 is mounted to the upper surface of the transistor Q2 at the interface 44 using an insulating epoxy. Then, it is connected to the terminal 24 with a bonding wire 26. Thus, the parasitic inductance can be suppressed to a minimum and the size and the weight of the package can be reduced. |
